Most GaN technologies today follow a lateral architecture that do not allow for easy scalability. For increased current and voltage the device architecture must grow laterally. However, this results in limited vertical growth due to the already thick EPI material due to the insulating buffer layers. This leading to a larger, less reliable power semiconductor.
Unlock the true potential of Gallium Nitride (GaN) with the world’s first GaN-on-GaN power semiconductor, NexGen Vertical GaN®
Simple GaN-on-GaN 3D structure and scalable roadmap
High-density Vertical JFET provides scalable, high conductivity power switches. The JFET channel utilizes high bulk GaN mobility to achieve an overall low RDSon device structure. This enables robust edge termination for full avalanche capability, which is a unique design patented by NexGen.
Leverage 3D architecture to scale
NexGen Vertical GaN® devices can leverage the 3D architecture for increasing current by growing in X and Y dimensions and increasing voltage by growing thicker EPI layers. This allows for a reliable, robust, and scalable architecture to make the perfect high voltage and high current power semiconductor.
Best-in-class temperature coefficient
- 1.6 for Vertical GaN vs. 2.25 for HEMT and 2.3 for Si SJ devices
- A 170mΩ Vertical GaN has an effective RDSon of 272mΩ at 150C
- This is comparable to a 120mΩ GaN-on-Si or Si SJ device
Lowest cost and better switching performance than SiC.
- 44% better FOM than SiC for Soft switching
- 47% better FOM than SiC for Hard switching
|Vertical Gan 170mΩ||349mR||28pF||20pF||4.6nC||9.8||7.0||1.61|
World’s only GaN to demonstrate robust single and repetitive avalanche performance.
- Reliable GaN-on-GaN structure
- Ability to weed out weak devices based on avalanche testing
- Applying best practices of Silicon product testing to Vertical GaN
- Not possible with GaN-on-Si devices
|Parameters||SiC JFET||NEXGEN GaN FinFET|
|Blocking Voltage (V)||1200||> 800|
|Active Area (mm2)||7||0.14|
|Testing condition||25 s, repetitive||3 s, repetitive|
|Critical EAVA (mJ)||621||7∼10|
|Normalized EAVA (mJ/mm2)||82.7||71.4|
|Avalanche cycle numbers survived||180||5000 (best)|
World’s only GaN with >10µs short circuit robustness
- Short-circuit test is a widely used criterion for power device
- 10 µs is the usual minimal time that most over-current protection circuits can step in to protect
- Only Si IGBT can achieve this today
- SiC and GaN-on-Si HEMT devices cannot withstand >10µs SC at bus voltage > 400V
Tests performed by Virginia Tech / CPES, “Breakthrough Short Circuit Robustness Demonstrated in Vertical GaN Fin JFET” published in IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 37, NO. 6, JUNE 2022